| &0000 | RESET ENTRY (RST 0) |
| Action | Resets the computer as if it has just been switched on |
| Entry | No entry conditions |
| Exit | This routine is never returned from |
| Notes | After initialisation of the hardware and firmware, control is handed over to ROM 0 (usually BASIC) |
| &0008 | LOW JUMP (RST 1) |
| Action | Jumps to a routine in either the lower ROM or low RAM |
| Entry | No entry conditions - all the registers are passed to the destination routine unchanged |
| Exit | The registers are as set by the routine in the lower ROM or RAM or are returned unaltered |
| Notes | The RST 1 instruction is followed by a two byte low address, which is defmed as follows if bit 15 is set, then the upper ROM is disabled if bit 14 is set, then the lower ROM is disabled bits 13 to 0 contain the address of the routine to jump to. This command is used by the majority of entries in the main firmware jumpblock |
| &000B | KL LOW PCHL |
| Action | Jumps to a routine in either the lower ROM or low RAM |
| Entry | HL contains the low address - all the registers are passed to the destination routine unchanged |
| Exit | The registers are as set by the routine in the lower ROM or RAM or are returned unaltered |
| Notes | The two byte low address in the HL register pair is defined as follows if bit 15 is set, then the upper ROM is disabled if bit 14 is set, then the lower ROM is disabled bits 13 to 0 contain the address of the routine to jump to |
| &000E | PCBC INSTRUCTION |
| Action | Jumps to the specified address |
| Entry | BC contains the address to jump to - all the registers are passed to the destination routine unaltered |
| Exit | The registers are as set by the destination routine or are returned unchanged |
| &0010 | SIDE CALL (RST 2) |
| Action | Calls a routine in ROM, in a group of up to four foreground ROMs |
| Entry | No entry conditions - all the registers apart from IY are passed to the destination routine unaltered |
| Exit | IY is corrupt, and the other registers are as set by the destination routine or are returned unchanged |
| Notes | The RST 2 instruction is followed by a two byte side address, which is defined as follows bits 14 and 15 give a number between 0 and 3, which is added to the main foreground ROM select address - this is then used as the ROM select address bits 0 to 13 contain the address to which is added &C000 - this gives the address of the routine to be called |
| &0013 | KL SIDE PCHL |
| Action | Calls a routine in another ROM |
| Entry | HL contains the side address - all the registers apart from IY are passed to the destination routine unaltered |
| Exit | IY is corrupt, and the other registers are as set by the destination routine or are returned unchanged |
| Notes | The two byte side address is defined as follows bits 14 and 15 give a number between 0 and 3, which is added to the main foreground ROM select address - this is then used as the ROM select address bits 0 to 13 contain the address to which is added &C000 - this gives the address of the routine to be called |
| &0016 | PCDE INSTRUCTION |
| Action | Jumps to the specified address |
| Entry | DE contains the address to jump to - all the registers are passed to the destination routine unaltered |
| Exit | The registers are as set by the destination routine or are returned unchanged |
| &0018 | FAR CALL (RST 3) |
| Action | Calls a routine anywhere in ROM or ROM |
| Entry | No entry conditions - all the registers apart from IY are passed to the destination routine unaltered |
| Exit | IY is preserved, and the other registers are as set by the destination routine or are returned unchanged |
| Notes | The RST 3 instruction is followed by a two byte in-line address. At this address, there is a three byte far address, which is defined as follows bytes 0 and 1 give the address of the routine to be called byte 2 is the ROM select byte which has values as follows &00 to &FB-- select the given upper ROM, enable the upper ROM and disable the lower ROM &FC - no change to the ROM selection, enable the upper and lower ROMs &FD - no change to the ROM selection, enable the upper ROM and disable the lower ROM &FE - no change to the ROM selection, disable the upper ROM and enable the lower ROM &FF - no change to the ROM selection, disable the upper and lower ROMs When it is retumed from, the ROM selection and state are restored to their settings before the RST 3 command |
| &001B | KL FAR PCHL |
| Action | Calls a routine, given by the far address in HL & C, anywhere in RAM or ROM |
| Entry | HL holds the address of the routine to be called, and C holds the ROM select byte - all the registers apart from IY are passed to the destination routine unaltered |
| Exit | IY is preserved, and the other registers are as set by the destination routine or are returned unchanged |
| Notes | See FAR CALL (RST 3) above for more details on the ROM select byte |
| &001E | PCHL INSTRUCTION |
| Action | Jumps to the specified address |
| Entry | HL contains the address to jump to - all the registers are passed to the destination routine unaltered |
| Exit | The registers are as set by the destination routine or are returned unchanged |
| &0020 | RAM LAM |
| Action | Puts the contents of a RAM memory location into the A register |
| Entry | HL contains the address of the memory location |
| Exit | A holds the contents of the memory location, and all other registers are preserved |
| Notes | This routine always reads from RAM, even if the upper or lower ROM is enabled |
| &0023 | KL FAR CALL |
| Action | Calls a routine anywhere in RAM or ROM |
| Entry | HL holds the address of the three byte far address that is to be used - all the registers apart from IY are passed to the destination routine unaltered |
| Exit | IY is preserved, and the other registers are as set by the destination routine or are returned unchanged |
| Notes | See FAR CALL above for more details on the three byte far address |
| &0028 | FIRM JUMP (RST 5) |
| Action | Jumps to a routine in either the lower ROM or the central 32K of RAM |
| Entry | No entry conditions - all the registers are passed to the destination routine unchanged |
| Exit | The registers are as set by the routine in the lower ROM or RAM or are returned unaltered |
| Notes | The RST 5 instruction is followed by a two byte address, which is the address to jump to; before the jump is made, the lower ROM is enabled, and is disabled when the destination routine is returned from |
| &0030 | USER RESTART (RST 6) |
| Action | This is an RST instruction that may be set aside by the user for any purpose |
| Entry | Defined by the user |
| Exit | Defined by the user |
| Notes | The bytes from &0030 to &0037 are available for the user to put their own code in if they wish |
| &0038 | INTERRUPT ENTRY (RST 7) |
| Action | Deals with normal interrupts |
| Entry | No entry conditions |
| Exit | All registers are preserved |
| Notes | The RST 7 instruction must not be used by the user; any external interrupts that are generated by hardware on the expansion port will be dealt with by the EXT INTERRUPT routine (see Low Kernel Jumpblock) |
| &003B | EXT INTERRUPT |
| Action | This area is set aside for dealing with external interrupts that are generated by any extra hardware |
| Entry | No entry conditions |
| Exit | AF, BC, DE and HL are corrupt, and all other registers are preserved |
| Notes | If any external hardware is going to generate interrupts, then the user must patch the area from &003B to &003F so that the computer can deal with the external interrupt; when an external interrupt occurs, the lower ROM is disabled and the code at &003B is called; the default external interrupt routine at &003B simply returns, and this will cause the computer to hang because the interrupt will continue to exist |